- There is no formal unit test for validating this

- The VPR option to connect clock pins is clock_modeling_method
- This only adds the relevant nodes to the rr_graph but does not
  place or route the clock
- This option is passed as a argument for all functions, will
  look for a better implementation in a future commit
- The current implementation affects all global pins not just clock
  pins, will fix this in a future commit
- This change is only tested graphically, where it shows the clock
  pin connection to the general routing after pushing the Toggle_RR
  button, will add missing test in a future commit

- This modification effects all global nets. Will modify in a
  future commit so that it only modifies clock nets.
- A test that the router routes clocks will be added in a future
  commit.

- This modification will be modified to be done only for clocks
  and not all global nets.
- A test to ensure both timing graphs match for clocks will be
  added in a future commit.

 - This reverts the following commits:
    - Added the VPR option for modeling clocks to the router options
    - Connected clock pins to general routing depending on VPR option
    - Passed parameter to route clocks in the timing driven router
    - Matched the router and timing analyzer net delay for global nets
 - Will reimplement in a cleaner way in a subsequent commit

- will be used when building the rr_graph to either connect
  clock pins to a dedicated clock network or keep them unconnected.
- will also be used in the router to route global clock nets using
  the dedicated clock network.

- clock_modeling_method was renamed to clock_modeling

- currently the argument is not being used and will produce a warning

- This is not ment to be used in production code. It is only a proof of
  concept

- TODO:
-- H-tree wires rr_node generation
-- Inserting clock network rr_nodes into a reverse lookup to find
   the source and tap locations
-- Creating edges for clock network rr_nodes

 - Missing clock to general routing
 - Missing clock to any type pin and any type pin to clock
 - Sill needs some polishing
 - Invalid read reported by valigrind needs fixing
   (may cause segfault)

 - fixes previous valgrid errors in clock code and segfaults

 - Also made the example generated clock more genaric

…l way

- updates the channel width information at the same time

This reverts commit d2f23bb.

…bals

- Initial way would copy the pointer to the array. This was fine since
  is_global_pin is an array and not a vector. But in the case of a
  vector the function would only modify the vector locally.
- Additionally, was initially taking a reference to device not
  mutable_device. Since t_type_descriptor is not encapsulated it doen't
  matter for now but it may in the future.

- build_rr_graph already supports fc for specific types of pins so
  there is no need to create a inter-block routing to clock pin
  connections in the clock rr graph generation code

…ions are created

…oPinsConnection class

…odes function behavior

Conflicts:
	vpr/src/base/place_and_route.cpp
	vpr/src/base/place_and_route.h
	vpr/src/place/place.cpp
	vpr/src/place/place.h
	vpr/src/place/timing_place_lookup.cpp
	vpr/src/place/timing_place_lookup.h
	vpr/src/route/route_common.cpp
	vpr/src/route/route_export.h
	vpr/src/route/rr_graph.cpp
	vpr/src/route/rr_graph_reader.cpp
	vpr/src/route/rr_graph_reader.h

…utils

…lock arch description

…es does

…iption

…o clock_{network|connection}_builders

…es() to ensure we reject invalid/unrecognized tags or attributes

Conflicts:
	vpr/src/place/timing_place_lookup.cpp

…arch

Conflicts:
	vpr/src/place/timing_place_lookup.cpp
	vpr/src/route/route_common.cpp
	vpr/src/route/route_export.h